1. Field of the Invention
This invention relates to methods for producing semiconductor devices, in which a substrate or a layer formed thereon is composed of GaAs, AlGaAs, Si, ZnSe or the like, and their substrate or growth temperatures are relatively low, for example, not greater than 500.degree. C. In such methods, crystallinity or crystallization of the devices is improved by an appropriate process conducted after the layer-growth process. The method is preferably utilized as a method of producing a semiconductor device which includes a sharp and flat compound semiconductor hereto-interface or boundary plane, typically, a quantum well structure having a hetero boundary plane of two flat compound semiconductors.
2. Related Background Art
It has been conventionally known that a boundary plane having a steep composition profile in a direction perpendicular to a substrate plane can be readily formed by controlling a supply of m group (e.g., Al) molecules when a hereto-junction between different kinds of III-V group compound semiconductors (e.g., GaAs and AlGaAs) is fabricated by the molecular beam epitaxy (MBE) method.
This kind of crystal growth of III-V group compound semiconductors by MBE is generally two or three dimensional growth from a growth core, and the hereto boundary plane is formed at an arbitrary timing by opening or closing of a shutter for controlling the supply of III group molecules. In this hetero-interface, there is a step of at least one atomic layer in a plane parallel to the substrate plane. The existence of the step can be known from the fact that a plurality of peaks appear in photoluminescence from AlGaAs/GaAs quantum well structure or GaAs/AlAs quantum well structure, and that an energy interval between the peaks is equal to a difference in a bound-state energy in the quantum well occurring when the thickness of quantum well is changed by one atomic layer. For example, it is reported that the boundary plane becomes flat by momentary interruption of the crystal growth at the hetero interface (see Jpn. J. Appl. Phys. 24, 1417 (1985).
Further, the crystal growth by the migration enhanced epitaxy (MEE) method is also known. For example, it is reported that crystal having excellent crystallinity and interface flatness can be obtained by MEE in which Ga and As are alternately grown one by one atomic layer (see Jpn. J. Appl. Phys. 25, 868 (1986)).
Following techniques are also known:
Conventionally, it has been reported that the threshold current density of a semiconductor laser fabricated by the molecular beam epitaxy (MBE) method was raised when the semiconductor laser was produced at a growth temperature in a relatively low temperature range as, for example, Appl. Phys. Lett. Vol. 36, p. 118 (1980) W. T. Tsang et al. discloses. FIG. 1 shows the structure of such laser. FIG. 2 illustrates the relationship between the threshold current density J.sub.tn and the substrate temperature.
In FIG. 1, there are formed, on an n-GaAs substrate 201, an Si doped GaAs buffer layer 202 having a thickness of 0.5 .mu.m , an Si doped Al.sub.o.3 Ga.sub.o.7 As layer 203 having a thickness of 1.5 .mu.m, an undoped GaAs active layer 204 having a thickness of 0.1 .mu.m, a Be doped Al.sub.o.3 Ga.sub.o.7 As layer 205 having a thickness of 1.5 .mu.m, a Be doped GaAs contact layer 206 having a thickness of 0.5 .mu.m and a Cr/Au alloy electrode 207 deposited on the contact layer 206. After the n-GaAs substrate 201 is thinned to a thickness of approx. 100 .mu.m, an AuGe/Ni/Au electrode 208 is deposited on the bottom surface of the substrate 201.
As is seen from FIG. 2 showing a substrate temperature dependency of threshold current density J.sub.tn of the thus fabricated laser which has a stripe width of 100 .mu.m and a cavity length of 300 .mu.m, the J.sub.tn of such laser is small near the substrate temperature of 650.degree. C. Namely, its performance is improved when near such substrate temperature. In contrast, J.sub.tn becomes greater than 14 kA/cm.sup.2 in the vicinity of substrate temperature of 300.degree. C. This value of threshold current density far surpasses the value of about 3 kA/cm.sup.2 below which a laser can practically be utilized. Thus, it is seen that the characteristic of a laser is lowered at such low substrate temperatures.
In recent years, there has been a growing interest in opto-electronic integrated circuits (OEIC) in which optical devices and electric or electronic devices are integrated on a common substrate (see J. Vac. Sci. Technol. B2(2), 259 (1984), Very low threshold current GaAs-AlGaAs GRIN-SCH lasers grown by MBE for OEIC applications). The OEIC features an enhanced reliability, relatively low cost, compactness in size and so forth, and is considered an important technology. However, its fabrication temperature becomes a problem when the integration is conducted.
That is, in conventional methods, the fabrication or substrate temperature is high when devices are produced, and hence inter-diffusions of composite elements and impurities are caused, leading to incapability of creating ideal doping profiles or distributions and ideal structures. As is described above, optical devices such as semiconductor lasers are usually fabricated at temperatures greater than 600 .degree. C. , and presently at still higher temperatures of about 700.degree. C. in order to better their performances. In contrast, electronic devices are principally produced at the growth temperature of about 500.degree. C. so that inter-diffusions of impurities or the like should be prevented. So, there is presently a temperature difference of about 200 .degree. C. between fabrication temperatures of optical devices and electronic devices.
Therefore, electronic devices are always produced after optical devices have been fabricated in order to achieve their integration while maintaining good characteristics of the electronic devices. Thus, the fabrication process becomes complicated since a plurality of epitaxial growths having different steps are to be conducted.
FIG. 3 illustrates an example of diffusion in Si doped GaAs. As seen from FIG. 8, an ideal doping shape 182 in fact severely collapses at the growth temperature of 550.degree. C. as indicated by a line 183.
As discussed in the foregoing, a low temperature growth is a critical technique in semiconductor processes. In particular, a low temperature growth of semiconductor lasers which are key optical devices is important for the integration of optical and electronic devices.
A hetero-epitaxy technique for growing a III-V group compound semiconductor such as GaAs on an Si substrate has been particularly highlighted in recent years in light of hetero-junctions with lattice mismatching. If GaAs and the like can be grown on an Si substrate, a less expensive substrate having a large area becomes available, and hence the following advantages will be obtained. 1 A highly efficient solar battery can be obtained. 2 It becomes possible to monolithicly form Si and GaAs materials, and hence OEIC's with satisfying performances can be achieved. 3 High speed GaAs ICs and high electron mobility transistor (HEMT) ICs can be fabricated on a substrate having a large area. 4 Heat radiation of power devices and semiconductor devices is improved because Si has a larger thermal conductivity than GaAs.
However, such growths are difficult to attain by usual methods since there exist 4% lattice mismatching and a difference in thermal expansion coefficients between Si and GaAs.
There have been developed the following methods for alleviating the lattice mismatching between Si and GaAs. 1 A GaAs/Ge/Si structure is fabricated using an intermediate layer of Ge. 2 After an Si substrate is cleaned at high temperatures, a thin, amorphous GaAs layer is grown at low temperatures and the temperature is raised in order to grow GaAs at normal growth temperatures. This is a two-step growth method for obtaining a structure of GaAs/low temperature GaAs/Si. 3 A GaAs/AlGaAs super-lattice is grown on Si and then GaAs is grown thereon to produce a structure of GaAs/GaAs-AlGaAs super-lattice/Si. 4 A strain super-lattice is formed as an intermediate layer to obtain a structure of GaAs/strain super-lattice/Si.
The MBE and metal organic-chemical vapor deposition (MOCVD) methods are used for growth of layers, and single crystal GaAs has been obtained in all of those methods.
Samples of various devices such as FETs, solar batteries and semiconductor lasers are made using GaAs grown on Si. It has also been reported that a GaAs/AlGaAs double hetero-laser fabricated on a Si substrate was successfully radiated at room temperature, though this is inferior to those grown on a GaAs substrate in characteristics.
FIGS. 4. 5A and 5B show characteristics of such example and its structure. In FIG. 4, an MOCVD apparatus at normal temperatures is used. There are provided, on an n-type Si substrate 171 of (100) 2.degree. off, a GaP layer 172 having a thickness of 0.1 .mu.m formed at temperature of 900.degree. C., a GaP/GaAsP strain super-lattice (20 nm/20 nm.times.5) layer 173 formed at 750.degree. C., an n-GaAs layer 174 having a thickness of 2 .mu.m and impurity concentration of 2.times.10.sup.18 cm.sup.-3, an n-Al.sub.x Ga.sub.l-x As lower cladding layer 175 having a thickness of 1.4 .mu.m and impurity concentration of 1.times.10.sup.18 cm.sup.-3, an undoped GaAs active layer 176 having a thickness of 0.08 .mu.m, a p-Al.sub.x Ga.sub.l-x As upper cladding layer 177 having a thickness of 1.4 .mu.m and impurity concentration of 4.times.10.sup.17 cm.sup.-3 and a p-GaAs layer 178 having a thickness of 0.65 .mu.m and impurity concentration of 1.3.times.10.sup.18 cm.sup.-3. On this structure, an Au-Zn/Au electrode 180 is deposited at a p-side while an Au-Ge/Au electrode 181 is deposited at an n-side. Its stripe width and cavity length are respectively set to 10 .mu.m and about 100 .mu.m.
FIG. 5A illustrates the characteristic of a laser formed on a GaAs substrate, and FIG. 5B illustrates the characteristic of the above-mentioned laser produced on Si substrate 171. It can be seen therefrom that oscillations of the TE+TM mode and TM mode occur in the laser on Si while an oscillation of only TE mode is caused in a double-hereto (DH) laser on GaAs. This phenomenon is considered to be attributable to the fact that the GaAs layer grown on Si receives a strain of about 10.sup.9 dyn/cm.sup.2 since the thermal expansion coefficient is different between Si and GaAs and that its degenerated hole energy level is split to create light and heavy hole levels.
Thus, although the laser oscillation is somehow achieved in the laser still produced on a Si substrate with improvement, such semiconductor laser has the following drawbacks.
1 Presently, a GaAs layer grown on Si substrate has an etch pit of 1.times.10.sup.6 cm.sup.-2, but the value of the etch pit is preferably less than 1.times.10.sup.-3 cm.sup.-2 in light of the lifetime of lasers. 2 The GaAs laser is produced at a high temperature of 700.degree. C., and hence a large stress occurs due to the difference in thermal expansion coefficient between Si and GaAs. In fact, this influence appears in the laser characteristic of TM mode oscillation and the like.
Thus, strain and the like have not yet been solved completely due to the differences in lattice constants between Si and GaAs and in thermal expansion coefficient, and the lifetime of laser is adversely affected. Unless those problems are solved, it is difficult to reduce such semiconductor lasers fabricated on the Si substrate into practice.
Next, a compound technique of semiconductor materials is important for optical communication technique, display technique and the like.
For example, it has been attempted to integrate semiconductor materials corresponding to three primary colours of light on a common substrate for satisfying requirements of flat panel displays and the like. As examples of such materials, AlGaAs can be cited for red colour, GaP for yellow, and ZnSe for blue. A GaAs substrate can generally be cited as a substrate. Lattice constants of AlGaAs, GaP and GaAs are generally equal to each other, and light emitting diodes and semiconductor lasers and the like using these materials are already reduced into practice. Devices using ZnSe, however, have not yet been employed practically. This is because a proper doping of ZnSe is hard to perform and because the growth temperature of ZnSe is quite different from that of GaAs layers. In general, an optimum growth condition of ZnSe resides in a range between 250.degree. C. and 350.degree. C. while that of GaAs is in a range higher than 500.degree. C.
Therefore, it has been usual in conventional growth examples to fabricate ZnSe on the GaAs substrate at temperatures from 250.degree. C. to 350.degree. C. If a GaAs layer were grown on a ZnSe layer, inter-diffusions of Ga, As, Zn and Se occur and an n-p junction would be formed at a boundary plane between GaAs and ZnSe.
FIGS. 6 and 7 show such examples. In FIG. 6, an n-ZnSe layer 152 is formed on an n-GaAs substrate 151. The growth temperature therein is 300.degree. C. Then, as shown in FIG. 7, an n-GaAs layer 153 is grown at the growth temperature of 500.degree. C. At this time, Zn is diffused from the ZnSe layer 152 to the GaAs layer 153. As a result, part 155 of the GaAs layer 153 becomes a p-type GaAs region. Similarly, Ga is diffused from the GaAs layer 153 to the ZnSe layer 152 and an n-type region 154 is formed in the ZnSe layer 152. Consequently, an npn junction is created between substrate 151 and GaAs layer 153.
Thus, except for the junction between n-ZnSe and p-GaAs, such a device having a diode characteristic will inevitably be created since there is a great difference in growth temperature between ZnSe and GaAs. This is a great obstacle to the achievement of ZnSe devices. Further, if GaAs is grown at low temperatures, many crystalline defects would occur.
In order to fabricate an efficient light emitting device, such material having a different band gap from ZnSe and at the same Lime having a lattice constant equal thereto is needed. As materials satisfying these conditions, GaAs and AlGaAs series are considered appropriate.
Thus, a need for technique to grow GaAs and so forth on ZnSe layer is great. If such technique is established, it becomes possible to integrate light emitting devices including a ZnSe layer, GaAs devices, ZnSe devices, GaP devices and so forth on a common substrate. Further, this technique is an important technique for crystal growth of II-VI group systems whose growth temperature is generally low.
However, in the above-discussed growth interruption method for achieving a flat boundary plane, it is necessary to interrupt the crystalline growth the moment III group atoms for forming one atomic layer are supplied, and if the timing of interruption is a little off, an island inevitably remains though the diameter of the island having a step difference of one atomic layer can be made larger than the radius of excitons. An example thereof is shown in FIG. 9B, which illustrates this example by comparison with an embodiment of the present invention shown in FIG. 9A. In FIG. 9B, reference numeral 1 designates an island having a step difference of one atomic layer and reference numeral 2 designates an exciton.
Further, the above-discussed MEE method for obtaining crystal having excellent crystallinity and boundary-plane flatness is not suitable for mass production since the rate of crystal growth is exceedingly slow.
Furthermore, the above-discussed semiconductor layers grown at low temperatures have a comparatively large number of crystal defects, and hence are inferior to layers grown at normal or relatively high growth temperatures.